Description:
Microprocessor performance has increased by 50−100 percent per year in the last decade, while DRAM performance has risen only 10−15 percent per year. Memory bandwidth, therefore, is rapidly becoming the performance bottleneck in the application of high-performance microprocessors to vector-like algorithms.
This invention is a method of rapid data access using a data processor for processing information with memory for information storage in conjunction with a memory control device that controls the access of stored information from memory. The memory control device is provided with temporary storage and decision ability, which allows the memory control device to select an access order, pre-fetch and store the information. The temporary memory temporarily holds the prefetched information until required by the data processor. The information is subsequently sent to the data processor in the order required for use. The compiler detects the ability to use the memory control device in response to the requirements of the data processor stored in the memory. The decision ability determines the order to execute the memory accesses based on the location of stored data within the processor's memory. The information is sent to the data processor, when requested, in the order required for use. The use of the memory control device to select the order in which to access information maximizes the bandwidth and decreases the retrieval time. The information requirements detected by the memory control can be data vectors. The memory can be multibank, interleaved or page mode DRAMS.
